GMS tapes out its test chip for advancing its CMOS+X low-power AI processing architecture

• February 11, 2025
• Christian Oliver
• 0.5 Minute Read

The concept behind the innovative Compute-In-Memory architecture developed by GMS is to significantly reduce weight movement and decrease the overall use of SRAM, ultimately integrating all memory for weight storage on chip with the incorporation of a Non-Volatile RAM.

The tape-out done at Global Foundries 22FDX Plus will allow to confirm, through silicon characterization, the overall drastic power consumption reduction and radiation tolerance expected with respect to state of the art architectures.

NASA is sponsoring these developments under a phase II contract.